CPU Evolution and Development

• Evolution of the CPU
• Generations of Processors
  • First-Generation Processors
  • Second-Generation Processors
  • Third-Generation Processors
  • Fourth-Generation Processors
  • Fifth-Generation Processors
    • The P5
    • The P-54C and P-55
  • Sixth-Generation Processors
    • The Pentium PRO
    • Intel Pentium II and Pentium III Processors
    • AMD K6, K6/2, and K6/3 Processors
  • Seventh-Generation Processors
    • AMD Athlon and Duron
    • The Pentium 4

  Evolution of the CPU

Of all the components in a computer system, none gets more publicity than the CPU when it comes time for a new release. It seems that everyone is waiting on the sidelines in anticipation of each new generation of CPU. Some new releases are based on speed alone, while every once in a while an actual new technology emerges. Examples of technology improvements would include an Front Side Bus (FSB = the protion of the External Data Bus that moves data in and out of the CPU from external locations), new micro-instruction sets moved onboard, or a new process added to chip functions. Also, from time to time, CPU manufacturers encode certain instructions into the CPU. As a result, when the prefetch goes looking for those instructions, it finds them waiting in the parlor, ready to serve.

For the first several years of PC evolution, it was Intel putting the vast majority of CPUs into PC-compatible computers. However, a number of other chip manufacturers, including Advanced Micro Devices (AMD), Texas Instruments, Cyrix, and others, entered the fray with competing clones. Since there is not room in this book to discuss every chip ever made, I'll limit my discussions to the primary CPU families from the major manufacturers.

AMD entered the fray early with a competing line of CPUs, even though it would be several years before it would begin to give Intel any serious competition. For many years, its CPUs were identical to those of Intel. Then, after a well-publicized lawsuit between Intel and AMD, AMD began developing significant new technologies of its own.

  Generations of Processors

Over the years, as CPUs have evolved, there have been relatively few drastic breakthroughs in technology. Manufacturers will produce lengthy runs of various models of CPU based on the technology of the day. When a new breakthrough occurs, a new generation is launched. Thus beget the generations of the modern CPU.

  First-Generation Processors

The first Intel CPU used by IBM in its Personal Computer was the 8088. An optional math coprocessor, the Intel 8087, was available for motherboards that supported these chips. The 8088 was actually a revision of an existing chip, the 8086. The 8086 had a 16-bit external data bus (EDB), a 16-bit internal data bus (IDB), and a 16-bit address bus. IBM wanted to make use of the 8-bit devices already on the market, so the 16-bit EDB was a problem. It also wanted to address more than the 64K of RAM that a 16-bit address bus accommodates.

It approached Intel, who agreed to produce a modification of the 8086 that it called the 8088. This chip had an 8-bit EDB, 16-bit internal registers, and a 20-bit address bus. The 20-bit address bus was achieved by combining two 16-bit registers onto a 20-bit register. A 16bit register can basically address 64K of memory. By using two 16-bit registers, programmers could slice programs and data into 64K chunks. This also allowed for backward compatibility to earlier systems.

Intel was to see the start of competition with this first "IBM-compatible" release. Within months, American Micro Devices, Inc. (AMD) had come out with its own 8088, and NEC released a chip called the V20. Of the three major manufacturers, NEC's was probably the best performer and showed up on a number of clones.

  Second-Generation Processors

This level of CPU is really only populated by a single family of chips. That is the 80286 along with its various clones. The biggest improvements in this chip line were the address bus and the ability to work in protected mode. The address bus was extended to 24-bit, allowing up to 16MB addressable physical memory.

Protected mode allowed the CPU to run multiple programs in "time slices," first focusing on one program for a few lines of code, and then allowing another program access to the CPU. In addition to timesharing the CPU, individual programs could be given their own slice of the memory pie. Each program running on the PC had its own memory address, which was "protected" from invasion by other programs, hence the name.

Protected mode, of course, required an operating system that supported it. Windows did not yet exist as we know it, and MS-DOS had no built-in provision for either protected mode or managing memory beyond 1MB. During the life of the 286, a version of UNIX, a version of 0S2, and one of Novel Netware was written to work in this mode. They allowed you to work in protected mode. However, in order to return to working in real mode, you had to reboot the machine.

The real can of worms that the 286 opened up was all that extra memory. It was invisible to MS-DOS, which was the operating system of choice for well over 80 percent of the computers being manufactured. In order to take advantage of it, certain third party companies wrote extensions to DOS that accommodated the extra addressable memory in other ways. Expanded memory allowed data to be stored in available memory above 1MB. This required loading the EMM device driver in lower memory (taking up a big chunk of conventional memory needed by DOS programs). Out of necessity, the program ran in conventional memory. Data could be stored in expanded memory. Data from expanded memory was fed to the program in 64K chunks.

For this to work, you needed, first of all, the expanded memory installed on your computer. Then you needed to install a program designed specifically to manage expanded memory. Finally, you could run programs that had been written specifically to address expanded memory.

  Third-Generation Processors

Intel's 80386 represents this generation of microprocessors. These CPUs incorporated the first true 32-bit registers. Internal, address, and external busses were all 32-bit. This allowed for up to 4GB of addressable physical RAM and an unthinkable 64TB of addressable virtual memory. Virtual memory was an entirely new concept introduced by the 386. In addition, an advanced instruction set known as the x86 instruction set was introduced into the CPU. These core instructions continue to be the basis for Intel-based CPUs to this very day. An often-overlooked attribute of the 80386 is its ability to pipeline instructions. The 32-bit registers allowed for twice as much data to be processed in a single clock cycle. More importantly, they allowed for commands to be 32 bits wide. Instructions could be more complex and the operating systems were subsequently more powerful. When more work can be done in a single clock cycle, everything speeds up.

Virtual memory is a way of convincing the programs running on the computer that there is more memory installed than there really is. It reserves a portion of hard disk space for a swap file. This file takes program data, user data, and so on, and loads it onto the hard drive in the same way it would have been loaded into RAM, had there been sufficient physical memory to support it. The operating system reports this swap file as memory to the applications. The release of Windows 3.0 and all subsequent versions made full use of this technology.

Another advanced operating mode that the 386 offered was called virtual real mode (sometimes called Virtual 8086). In this mode, "bubbles" of 1MB memory spaces are created in which separate DOS programs could run. An operating system, such as Windows, that supported virtual real mode could load all the necessary device drivers and core program files into one of these address spaces and convince DOS programs that this memory constitutes the entire machine. As a result, the DOS program thinks it's the only program running and more than one DOS program at a time could be running.

A performance enhancement that began with the 386 and that is now a part of all CPUs is the process of pipelining instructions. As one set of instructions is being executed, the CPU is already in the process of lining up the next set to send through the "pipeline". This process not only enhanced the performance of the then-present lines of chips, it also opened the door to the dual-speed CPUs of today that have faster internal processing speeds than their external data bus.

The only problem with the 80386 was that, since it utilized a 32-bit external data bus, the CPU required newly designed 32-bit motherboards. There were several manufacturers that weren't tooled up to build these boards, but there were millions of 16-bit motherboards being built. In order to increase the acceptance of the 386 family, the 803865X was released with a 16-bit external data bus. It was basically a crippled 386. It had all the advanced functions of the 386, however, and was therefore able to run Windows.

The 386SL was the first line of CPUs to be developed for the lower voltages required for laptop computers. There had been a number of 286 laptops, but they required about three hours of charging for every half hour of use. By running at 3.3V instead of 5V, the life of the portable computer's battery was greatly enhanced. Other brands, including AMD and Cyrix, released lower-voltage CPUs.

  Fourth-Generation Processors

The 80486DX was basically an evolution of the 386. None of the registers or busses was altered. The real advances were in other forms. The biggest real advance of the CPU was an advanced instruction set. The most commonly used instructions were permanently loaded into the CPU and instantly available when those instructions were called upon. This prevented the CPU from having to load and unload those instructions from memory each time they were called upon.

One of the key limitations of CPUs prior to the 80486 is that the only arithmetic functions they could perform were basic addition, subtraction, multiplication, and division. Also, they could only handle full-integer mathematics. Anything more advanced required programmers to break the formulae down to their basic steps. The other option was to install the MathCo specific to the CPU. The 486DX was the first CPU to have a coprocessor built right in.

Another improvement of the 486 was to add 8K of L1 cache right on the CPU. It could also make use of L2 cache installed on the motherboard. In order to make the L2 cache faster, a special form of memory called static RAM (SRAM) was used. SRAM was designed differently than DRAM and did not require frequent refreshes.

There are actually two varieties of cache. Write-through cache sends data directly out of the CPU to RAM, whether the MCC is ready or not. If not, the CPU simply sets up a wait state. In other words, the data waits in line for a seat on the external data bus. Write-back cache will store the data in L2 cache until a clock cycle comes along that can transmit it back to RAM.

The 486 had the capability of talking to the local bus at either 25 or 33MHz, depending on the CPU. ISA devices were still limited to 8.33MHz for backward compatibility, but VESA Local Bus and the Peripheral Components Interconnect (PCI) both came out during the 486 reign. I'll be discussing these busses in detail in Chapter Ten, Examining the Expansion Bus. VESA stands for Video Electronic Standards Association, which was the organization that defined the 32-bit VESA standard popular in 486s. PCI allowed for even faster bus speeds. Both tapped into the local bus to allow components to operate at the external bus speed of the CPU in order to overcome the 8.33MHz limitation of ISA.

Note: Just changing the speed of a CPU is no guarantee of a noticeable performance gain. A rule of thumb is that to achieve a barely perceivable gain in performance, you must double CPU speed. On the other hand, new technologies, such as on-chip instruction sets that relate to the type of work you do or a faster front-side bus, can provide substantial gains.

Under earlier technology, the maximum speed of the CPU was limited to that of the external data bus. That was before Intel developed a technology called clock doubling that allowed the CPU to operate at twice the EDB speed. This allowed for a 66MHz microprocessor. These CPUs were called DX2s. Then came the DX4. DX-4 CPUs processed data internally at a speed three times that of the EDB. Therefore, the 25MHz 486 DX-4 ran internally at 75MHz, and the 33MHz DX-4 ran at 100MHz. (Note that the actual speed of the CPU was 33.32MHz..

The 486SX was released as an "economy" 486. The official version of how this chip was different than other 486s was that it lacked a math coprocessor. This was purely marketing hype. Intel never bothered to retool for a different CPU. It simply disabled the math coprocessor. Therefore, a product that actually had to go through an extra manufacturing step was sold at a lower price simply to appease the public.

  Fifth-Generation Processors

Now for a quick history lesson. Throughout the reign of the 386s and 486s Intel kept a pretty tight grip on the market. It had the marketing clout, it had the engineering clout, and it had the best research and development. What it lacked was sufficient production capabilities to keep up with increasing demand for its chips. To pick up the slack, Intel signed into a cross-licensing agreement with Advanced Micro Devices, Inc. (AMD). Intel would provide the R&D, cross license the patents to AMD, and the two companies would outsource chips to each other.

This worked out pretty well for both companies for a while. It was an almost-perfect symbiotic relationship. Unfortunately, somewhere along the line, relations between the two companies began to deteriorate. Intel had opened two new production facilities and no longer needed the services of AMD. There followed a rather unpleasant legal battle, with decisions being reversed and then restored and then being reversed again as the case was passed from one judge to another. 'While, theoretically, Intel won, it ended in a decision not entirely favorable to Intel. It was decided that the cross-licensing agreements did indeed allow AMD to continue to produce CPUs based on technology that had been licensed to it. Unfortunately for AMD, this only included technology up to the 80386. In another related case, the courts determined that the terms 80486, 80386, and so forth, had come to be generic terms for a type of CPU, in that Intel, AMD, and Cyrix had produced chips using this nomenclature without challenge from Intel. Therefore, Intel could not copyright the trade name 80486.

Of course, Intel hadn't been sitting back on its heels doing nothing the whole time the courts were deciding the outcome of the lawsuit. The 80586 was already behind the curtains, waiting for its debut. Intel had been procrastinating release of the CPU until it knew what impact the ruling may have on its intellectual property rights. The resultant release, the Pentium, was so named because it was a trademark that could be copyrighted. In addition, a few engineering tweaks used technology that had not been cross-licensed to AMD.

  The P5

The first Pentiums to be released were 5V chips. There were two speeds of the P5 made available, the 60MHz and the 66MHz. In actuality, the original design called for all P5s to be 66MHz. Unfortunately, manufacturing yields were resulting in a lot of chips that just couldn't run at 66MHz without overheating. They could, however, run at 60MHz. They were labeled as 60MHz and shipped out.

This CPU was redesigned to have a 64-bit EDB. This was passed through to two internal 32-bit data busses. Therefore, internally, data could be processed only in 32-bit chunks, but two chunks could be sent along two different pipelines in a single clock cycle. This process is known as superscalar architecture. Operating systems were only using 32-bit code; many still contained large amounts of 16-bit code. Therefore, this new architecture was a more efficient method for processing data as long as it was 32-bit code. Intel named these pipelines the U pipeline and the V pipeline. Neither available literature nor Intel's representative was able to tell me why.

Changes made to the Pentium make it quite a bit faster than the fourth-generation processors aside from raw speed and bus width. The speed of the EDB was increased as well. The fastest EDB on any 486-class CPU was 33MHz. For the Pentiums, this was increased to 60MHz for the P5-60 and 66MHz for the remainder of the fifth-generation CPUs. Another technological improvement was an ability to perform branch predictive processing. This is the same branch prediction I discussed in Chapter Seven, Understanding CPUs.

The L1 cache was divided into two sections. 8K of L1 cache was set aside specifically for instructions, while another 8K was there for data. Each cache section was specifically designed for the unique requirements of each function.

The P5s were not without their problems. A 5V chip running at this speed ran very hot. They all had to be cooled very efficiently or they would fry. The most infamous defect was a design flaw in the FPU. Certain patterns resulted in mathematical calculations that were off. At first, Intel tried to play the issue down, but as more and more demonstrations of the error emerged, it finally acknowledged it as an issue.

  THE P-54C AND P-55

The P5 endured a very short life and was quickly replaced by 3.3V versions, often referred to as the P-54Cs. As the P-54C went through its life span it eventually reached a speed of 200MHz. Starting with the 200MHz, Intel began incorporating a technology it named MMX. The MMX eventually reached a top speed of 266MHz.Unlike the 486 with internal clock doublers, the Pentium made use of circuitry on the motherboard to set the internal clock speed. The 66MHz EDB on most motherboards allowed for 100MHz (i.5x), 133MHz (2x), 166MHz (2.5x), 200MHz (3x), 233MHz (3.5x), and 266MHz (4x). On earlier Pentium-class computers, this multiplier circuit was something that had to be set. If you set the multiplier too slow, the CPU would simply run at the speed you assigned it. For example, if you purchased a 233MHz CPU and set the multiplier at 3x, it would simply run at 200MHz. Likewise, if you purchased, the 200 and set it at 3.5x, it would run at 233MHz. This was a technique called overclocking. This practice had an inherent risk of overheating the CPU and has been blamed for data processing errors as well.

MMX technology was developed in answer to increasing demand for improved multimedia performance. Chips incorporating MMX are known as P-55s. It incorporated four new registers and fifty-seven internally programmed commands that greatly enhanced multimedia technology. When a program called for one of these instructions, the CPU didn't have to go out onto the address bus looking for it. It was right there at home, where it belonged. MMX also extended the i386 instruction set to allow multiple bytes of data or instructions to be stored in a single set of registers. All manipulations performed on the set simultaneously affected all instructions or data stored within. This further enhanced performance.

While MMX was not exclusive to multimedia, software had to be written to take advantage of it. The person who spent his or her entire existence poring over text documents or pounding numbers into a spreadsheet saw little or no performance gain. Also, Intel's design called for the MMX decoder and the FPU to share the same sets of registers. As a result, processing routines that require the simultaneous usage of the MMX unit and the FPU exhibited extreme slowdown.

Cyrix also released some product lines that it claimed (and others confirmed) were faster than Intel's offerings at the same clock speed. It shared with the AN4D KS the ability to reorder instructions prior to executing them. Unique to the Cyrix CPU was a feature known speculative processing. This was when the CPU executed an instruction it thought was going to be required even before the programming code confirmed it. Some of the features that were common with the Intel processor were improved upon. For example, Cyrix's branch predictive processing was capable of multiple branches, not just a single branch. Cyrix chose to design in seven integer execution stages, compared to Intel's five stages.

As a result of these enhancements, Cyrix's 6x86, while only clocking out at 133MHz, could keep up with, and in some circumstances outperform, an Intel Pentium 166. As a result, it joined with AMD to begin using something it called P-ratings for its CPUs. P-ratings do not represent true clock speeds. This can make setting the multiplier on older motherboards that are still set manually a little problematic. You would definitely want to have a copy of the manual for the motherboard before attempting to configure one of these non-Intel CPUs.

Other companies quickly stepped up to the table with their "586" offerings. They weren't allowed to call them "Pentium or even "Pentium-class." The word Pentium is a registered trademark, and Intel is righteously (and rightfully) protecting its intellectual property. AMD's first offering, the K5, was not warmly embraced by the technical community. Many complained of significant compatibility issues, claiming frequent lockups in Microsoft Windows. Others praised its virtues and called it the "Intel-killer".

In many respects, the K5 was superior to the Pentium on a technological level. It was closer akin to a Reduced Instruction Set Computing (RISC) processor than it was to the old i386 code. It used a front-end decoder to make it i386 compatible (which may well have been the source of many of the issues reported). It also possessed the ability to process instructions outside of the order in which they were delivered. Overall, it could be argued that it was a better processor (oh paper, anyway). Unfortunately, whether earned or not, it carried with it a bit of a bad reputation.

  Sixth-Generation Processors

The CPUs that fall under the category of Sixth Generation is quite a mixed bag. They emerged at a time when technological developments had picked up their pace rather dramatically. As a result, there are a number of different microprocessors from different companies with radically different designs and specifications. The diversity of processors that exist in this category leads to a little confusion and some disagreement as to where a couple of the processors should really fall. Where possible, I've let the manufacturer dictate.

  The Pentium PRO

Intel marked the introduction of its P6 with the Pentium PRO 150. This was the first of Intel's CPUs that was designed specifically to run pure 32-bit operating systems. Therefore, users running Windows NT 4.0 or pure 32-bit UNIX enjoyed noticeably faster performance. It employed a process of superpipelining. This increased the number of execution steps the CPU could process on an instruction set to a total of fourteen. L1 cache was divided into two independently addressable areas. There were separate instruction and data caches of 8K each.

This was the first chip into which Intel placed L2 cache directly onto the die. Depending on model, 256K, 512K, or 1MB of L2 cache was available. Placement of L2 cache directly onto the CPU increased performance rather dramatically. Onboard L2 cache also made the CPU the perfect candidate for servers or workstations designed for multiprocessor capability. As each processor maintained its own cache, they weren't competing for whatever cache may be available on the motherboard.

The address bus was bumped from 32-bit to 36-bit, increasing addressable memory to 64GB. This was another feature that made it the perfect choice for servers in its day.

  Intel Pentium II and Pentium III Processors

With these CPUs, Intel combined the technology of the Pentium PRO and MMX. One of the key complaints of the Pentium PRO was that, since it was designed exclusively to handle 32bit code, it had a tendency to bog down when forced to run OSs such as Windows 95 or Windows 98 that contained a mixture of 32-bit and 16-bit code. Through the use of Segment Register Caches, 16-bit and 32-bit code could be run independently through the pipelines. Like the Pentium PRO, the II and III incorporate 512K L2 cache onboard. One significant change here, however, was that the onboard L2 cache was designed onto an independent back-side bus that ran at one-half the clock speed of the processor itself. Still, this is somewhat of an improvement over L2 cache on the motherboard, which can only be addressed at the speed of the front-side bus. The amount of L1 cache was doubled as well. Each of the L1 registers was increased to 16K, for a total of 32K L1 cache. All of the MMX commands and registers were incorporated onto the CPU as well.

Differences between the Pentium II and III were primarily feature-oriented. The Pentium III added extensions to the instruction set that permitted the CPU to execute 3D graphics functions more efficiently. (The impact of this improvement might have been slightly hampered by the fact that AMD had been shipping CPUs with that feature for nearly a year already.) One controversial feature that Intel added to the chip was an electronic serial number (ESN).

The ESN was a number, unique to each CPU that was manufactured, that would identify that particular chip. This ESN could be used for many different purposes, some good, and some not so good. On the positive side, a network administrator could use it to manage networks more efficiently with systems management software designed to take advantage of ESNs. However, it also could be used to track Internet usage and to gather information about users activities while on the Internet. Consumer advocacy groups protested this potential invasion of privacy, and just prior to shipping, Intel reversed its philosophy and shipped the chip with the ESN disabled by default. As it currently stands, in order to make use of the ESN, network administrators have to run a control utility that allows them to enable or disable the ESN.

The first generation of Pentium II and some models of the Pentium III CPU brought with them a significant design change as well. Intel incorporated the chip onto an SECC. This proprietary design was intended to keep all other manufacturers from designing anything directly like it. Later releases would revert back to a conventional socketed CPU using variations on the Socket 370.

  AMD K6, K6/2, and K6/3 Processors

AMD's excursion into the sixth generation included three different versions of the K6. I've decided to lump them all together as a group, because the technical differences were minimal. With these processors, the P-rating system was abandoned. The CPUs are rated at their actual clock speeds. AMD incorporated a full 64K in L1 cache onto these chips, 32K data and 32K instruction. To further enhance performance, a total of four instruction decoders keep data flowing through the pipelines. And, since it was adding extra components to the processor, AMD decided it might be a good idea if there was more than a single arithmetic logic unit (ALU). Six integer execution units were added. All AMD K6 series CPUs fall into the Socket Seven form factor.

The K6 series improved performance slightly over the equivalent Pentium II CPUs by Intel when running certain types of applications. However, the Pentium II instruction set seemed to give it a slight advantage when running 32-bit code. The K6/2 series added a dedicated set of forty-five instructions for handling 3D rendering of graphics that it called 3DNOW! This was a feature that enthralled the gaming crowd, and the AMD chip took its first steps into becoming a serious competitor for Intel.

Prior to the release of the K6/3, the AMD chips had taken the approach of putting the L2 cache onto the motherboard. This put the choice of how much L2 cache to use onto the motherboard manufacturer's lap. A typical Socket Super 7 board to support the AMD K6 would have anywhere from 512K to as much as 2MB of L2 cache.

The K6/3 put 256K of L2 cache onto the chip die. Still, it could be used on the majority of motherboards that supported the K5/6 CPU (though many required a BIOS upgrade) and would use the motherboard cache as a third level, or L3 cache. As a result, it was possible to have a system with up to 2.3MB of total cache.

  Seventh-Generation Processors

It was with the Seventh-Generation processors that AMD managed to take the lead in microprocessor technology away from Intel, if but for a short while. It was first with its K7, or Athlon, processors. AMD initially followed Intel's lead in that the first few releases shipped in a Slot A form factor that was cosmetically identical to Intel's Slot 1. This was its first foray into a cartridge design (although it would later revert to producing the CPUs in a newer Socket A form factor).

  AMD Athlon and Duron

The first Athlons to be released, the Model 1, were based on .25-micron technology. This began to be a bit of a problem as AMD started pushing the envelope of speed for transistors that size, and it made the move to .18-micron manufacturing with the Model 2.

The Thunderbird series of Athlon CPUs is its flagship line of processors. It was the first to break the gigahertz barrier and the first to hit the market with a commercially available CPU using copper instead of aluminum for the interconnects between the layers of the chip.

The Athlon chips can credit much of their superior performance not to the high processing speed but rather to a 200MHz FSB. This is a full 50 percent faster than equivalent Intel products (except for the Pentium 4, which I will get to next). More recently, supported by its own AMD 760 chipset, it has achieved a 266MHz FSB. Processors using this technology are available in 1GHz and up.

The new Athlon bus is divided into three channels. Controlling the bus is the universal processor request channel and a universal snoop channel. Data moves back and forth across the bus on a 72-bit bidirectional data channel. The data channel provides 32 bits of bandwidth in each direction plus an additional 8 bits for error-correction code.

Realizing there was a market for higher-end, low-priced chips, it came out with a line of CPUs it labeled the Duron. Following Intel's lead (when it made the Celeron), it is a scaled down version of the Athlon. It maintains the clock speeds, but drops back to a lower 64K of on-chip L2 cache. Still, with its 128K of L1, evenly divided between instruction and data registers, performance manages to maintain very high levels.

  The Pentium 4

Half the fun of working in the computer industry is watching companies such as AMD and Intel play leapfrog with each other. The spirit of competition, in my opinion, is more prevalent in this industry than anywhere else in the world. Intel proves that with its Pentium 4.

The first release of the CPU was based on Intel's new 400MHz FSB and supported only by the 1850 Willamette chipset. The only memory supported by this chipset is Rambus memory. This turned out to be a bit shortsighted on Intel's part, in so much as the perceived superiority of the first generation of Rambus memory was overrated.

Subsequent chipsets were designed that could either use conventional PC-133 memory or, more recently, double data rate (DDR) memory. They also provide a 533MHz FSB. The first P4s to hit the streets were based on the same .18-micron technology used by Pentium III CPUs. However, in 2001 the Northwood became Intel's first copper-based chip using .13-micron technology. Subsequent CPUs have followed suit.

One note on the actual FSB speeds of the Pentium 4 is this: These CPUs use something called quad-pumped technology. The actual clock speeds of the bus are 100MHz x 4 on the chips with a 400MHz rating and 133MHz x 4 on the 533MHz chips. What quad-pumping does is to move data four times on every clock cycle.